如题所述
首先第一步,需要把想要观测的信号标记出来,即mark_debug,有两种mark_debug的方法,我用verilog写了一个简单的流水灯程序,只有几行代码,如下:
module main(
input clk,
input rst,
output reg [7:0] led
);
(*mark_debug = "true"*)reg [23:0] counter;
always @(posedge clk) begin
if(rst) begin
counter <= 0;
led <= 8'b00000001;
module main(
input clk,
input rst,
output reg [7:0] led
);
(*mark_debug = "true"*)reg [23:0] counter;
always @(posedge clk) begin
if(rst) begin
counter <= 0;
led <= 8'b00000001;
温馨提示:答案为网友推荐,仅供参考